Posts for tag: Domain-Specific Language
This is the final step of my Racket DSL implementation roadmap.
It consists in promoting Tiny-HDL as a standalone language with two flavors:
a Lisp-like syntax and a custom syntax.
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Racket offers a sophisticated module system that allows to organize
a program into multiple files. In this step, we will show a solution to
take advantage of Racket modules in a DSL.
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In this post, we add more semantic checks.
A circuit description will be considered correct if it respects some common
electronic design rules.
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The semantic checker for Tiny-HDL will be written in two steps.
In the name resolution step, the checker introduces scopes in the abstract
syntax tree, and uses them to map each named reference to the corresponding
declaration.
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In step 1,
I have written the full adder example in Racket, following a few mapping rules
to express the concepts of the Tiny-HDL language.
The next step consists in writing a code generator that implements these mapping rules
so that we can generate Racket code automatically.
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In the previous post,
I have sketched an informal specification of a small hardware description language
called Tiny-HDL.
Our goal is to execute circuit descriptions, written in Tiny-HDL, on the Racket
platform.
Which means that we need to implement a compiler from Tiny-HDL to Racket.
As explained in the proposed language implementation roadmap,
we will start in the execution step, with a hand-written Racket example program that
implements the Tiny-HDL concepts.
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For many years, I have felt an attraction to languages from the Lisp family,
but I was held back by two concerns: my indecisiveness about which variant to learn,
and the lack of a personal project to implement with it.
Recently, I have started drafting the Hardware Description Language (HDL)
of my dreams and I have decided to try Racket,
a Scheme variant
that is also advertised as a language-oriented programming language.
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